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  page . 1 july 13.2010-rev.00 2N7002KTB6 1 2 3 6 5 4 fig.56 features ? r ds(on) , v gs @10v,i ds @500ma=3 ? r ds(on) , v gs @4.5v,i ds @200ma=4 ? advanced trench process technology ? high density cell design for ultra low on-resistance ? very low leakage current in off condition ? specially designed for battery operated systems, solid-state relays drivers : relays, displays, lamps, solenoids, memories, etc. ? esd protected 2kv hbm ? in compliance with eu rohs 2002/95/ec directives mechanical data ? case: sot-563 package ? terminals : solderable per mil-std-750,method 2026 ? marking : 27 60v n-channel enhancement mode mosfet - esd protected maximum ratings and thermal characteristics (t a =25 o c unless otherwise noted ) note: 1. maximum dc current limited by the package 2. surface mounted on fr4 board, t < 5 sec pan jit reserves the right to improve product design,functions and reliability without notice parameter symbol limit units drain-source voltage v ds 60 v gate-source voltage v gs + 20 v continuous drain current i d 115 ma pulsed drain current 1) i dm 800 ma maximum power dissipation t a =25 o c t a =75 o c p d 200 150 mw operating junction and storage temperature range t j ,t stg -55 to + 150 o c junction-to ambient thermal resistance(pcb mounted) 2 r ja 883 o c/w sot-563
page . 2 july 13.2010-rev.00 2N7002KTB6 electrical characteristics parameter symbol test condition min. typ. max. units static drain-source breakdown voltage bv dss v gs =0v, i d =10 a60--v gate threshold voltage v gs(th) v ds =v gs , i d =250 a1-2.5v drain-source on-state resistance r ds(on) v gs =4.5v, i d =200ma - - 4 .0 drain-source on-state resistance r ds(on) v gs =10v, i d =500ma - - 3.0 zero gate voltage drain current i dss v ds =60v, v gs =0v --1 a gate body leakage i gss v gs =+ 20v, v ds =0v - - + 10 a forward transconductance g fs v ds =15v, i d =250ma 100 - - ms dynamic total gate charge q g v ds =15v, i d =200ma v gs =4.5v --0.8nc turn-on delay time t on v dd =30v , r l =150 i d =200ma , v gen =10v r g =10 --20 ns turn-off delay time t off --40 input capacitance c iss v ds =25v, v gs =0v f=1.0mh z --35 pf output capacitance c oss --10 reverse transfer capacitance c rss --5 source-drain diode diode forward voltage v sd i s =200ma , v gs =0v - 0.82 1.3 v continuous diode forward current i s --- 1 1 5 m a pulsed diode forward current i sm --- 8 0 0 m a v dd v out v in r g r l switching test circuit gate charge test circuit v dd v gs r g r l 1ma
page . 3 july 13.2010-rev.00 2N7002KTB6 fig.1- output characteristic fig.1- output characteristic typical characteristics curves (t =25 c,unless otherwise noted) a o typical characteristics curves (t =25 c,unless otherwise noted) a o fig.2- transfer characteristic fig.2- transfer characteristic fig.3- on resistance vs drain current fig.3- on resistance vs drain current fig.4- on resistance vs gate to source voltage fig.4- on resistance vs gate to source voltage fig.5- on resistance vs junction temperature fig.5- on resistance vs junction temperature 0 0.2 0.4 0.6 0.8 1 1.2 012345 v ds - drain-to-source voltage (v) i d - drain-to-source current (a) v gs = 6.0~10v 5.0v 4.0v 3.0v 4.0v 3.0v 5.0v 0 0.2 0.4 0.6 0.8 1 1.2 0123456 v gs - gate-to-source voltage (v) i d - drain source current (a) v =10v ds v =10v ds v =10v ds t =25 j t =25 j t =25 j 0 1 2 3 4 5 2345678910 v gs - gate-to-source voltage (v) i d =200m a i d =500m a r - on-resistance ( ) ds(on)  i =200ma d 0 1 2 3 4 5 0 0.2 0.4 0.6 0.8 1 i d -draincurrent(a) v gs =4.5v v gs =10v r - on-resistance ( ) ds(on)  0.6 0.8 1 1.2 1.4 1.6 1.8 -50 -25 0 25 50 75 100 125 150 t j - junction temperature ( o c) r ds(on) - on-resistance(normalized) v gs =10v i d =500ma
page . 4 july 13.2010-rev.00 2N7002KTB6 fig.6 - gate charge waveform fig.6 - gate charge waveform fig.8 - threshold voltage vs temperature fig.8 - threshold voltage vs temperature fig.7 - gate charge fig.7 - gate charge fig.9 - breakdown voltage vs junction temperature fig.9 - breakdown voltage vs junction temperature fig.10 - source-drain diode forward voltage fig.10 - source-drain diode forward voltage qgd qgs qg qsw vgs(th) vgs qg qg(th) 0 2 4 6 8 10 0 0.2 0.4 0.6 0.8 1 q g -gatecharge(nc) v gs - gate-to-source voltage (v) v =10v i =250ma ds d 72 74 76 78 80 82 84 86 88 -50 -25 0 25 50 75 100 125 150 t j - junction temperature ( o c) bv dss - breakdown voltage (v) id = 250ua 0.7 0.8 0.9 1 1.1 1.2 -50 -25 0 25 50 75 100 125 150 t j - junction temperature ( o c) v th - g-s threshold voltage (normalized) i d =250  a 0.01 0.1 1 10 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 v sd - source-to-drain voltage (v) i s - source current (a) v =0v gs t =125 j 25 -55
page . 5 mounting pad layout ? packing information t/r - 4k per 7" plastic reel t/r - 10k per 13" plastic reel order information legal statement copyright panjit international, inc 2010 the information presented in this document is believed to be accurate and reliable. the specifications and information herein are subject to change without notice. pan jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. pan jit products are not authorized for use in life support devices or systems. pan jit does not convey any license under its patent rights or rights of others. 2N7002KTB6 july 13.2010-rev.00


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